Programmable logic devices (PLDs) (e.g., field programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), field programmable systems on a chip (FPSCs), or other types of programmable devices) may be configured with various user designs to implement desired functionality. Typically, a user design undergoes a synthesis process in which the user functionality is converted to a logical representation (e.g., a netlist or register transfer level (RTL) description). The logical representation is then mapped to the types of resources available in the PLD (e.g., programmable logic gates, look-up tables (LUTs), embedded memories, embedded hardware, or other types of resources). Thereafter, the mapped design undergoes placement and routing in which it is specified in terms of the particular physical components and physical connections of the PLD. The resulting configuration data may then be loaded into PLD memory to configure the device.
For certain PLDs, some of the physical components may be hardwired to global set/reset (GSR) resources. By providing an appropriate signal to the GSR resources, large numbers of physical components of the PLD may be simultaneously set or reset. For example, such features may be used to reset the PLD to a desired state during testing and evaluation of a given user design.
In some cases, the GSR resources may be leveraged for use as part of the actual design implementation by providing a signal of the user design to the GSR resources. However, in most conventional approaches, signals are only assigned to the GSR resources during the mapping stage after the design has been synthesized into its logical components. As a result, such approaches cannot be used to reduce the overall number of logical components used to implement the user design. In some other approaches, the GSR resources may be used to a limited extent during synthesis by assigning a user signal to GSR resources based only on a fanout count of the user signal across the entirety of the design. Thus, conventional approaches to GSR resources provide little practical benefit for implementing real world designs in PLDs.
Embodiments of the present invention and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.